This invention relates generally to a method of producing a semiconductor device, and more particularly, to a method of electrically isolating individual devices sharing a common substrate.
In the process of fabricating integrated circuits (IC), one of the more important considerations is the means of electrically isolating devices such as amplifiers from other circuit devices placed upon a common substrate. Isolation at lower frequencies can usually block all the direct current (DC) leakage, but as the operating frequency of the integrated circuit increases, the DC parasites coupling components, mostly stray capacitance, becomes very important to the designer of integrated circuits. For example, a one picofarade stray capacitance has an impedance level equal to about 150 kilo-ohms at one megahertz (MHZ). At one gigahertz (GHZ), the same capacitance has an impedance of about 150 ohms; therefore, in order to fabricate high frequency integrated circuits, great effort is directed to reducing coupling capacitance and, in addition, to control the DC leakage current.
The standard junction isolation technique used in ICs at lower frequencies is not suitable at higher frequencies because the coupling capacitance does not scale proportionately to the particular device size on the IC chip. By reducing the device size so as to increase the distance between the different components, the coupling capacitance tends to remain approximately constant. In the past, most high frequency ICs have used the oxide isolation technique to minimize the above problems.
The most widely used oxide isolation technique is the nitride mask selective oxidation process known by various trade names such as SATO, ISOPLANAR, and OAT. For example, the self-aligned thick oxide (SATO) process is more limited because an excessively long oxidation time is required to grow thick oxides: a one micrometer layer of oxide requires four hours of steam oxidation at 1000.degree. centigrade and a two micrometer layer of oxide requires 16 hours at the same temperature; therefore, clearly, oxide thicknesses ranging from three to five micrometers would not be commercially feasible using this technique.
Another technique of forming a thick oxide is the anodic oxide process. The anodization results in a porous silicon layer in which the depth and porosity are controlled by the current density and etch time. The porous layer is quickly converted to a thick oxide by a conventional wet oxygen oxidation. Oxide films can be more than an order of magnitude thicker than for the same oxidation cycle of untreated silicon. The resulting oxide does have a level surface, as in the case of epitaxial refill. The short times and relatively low temperature (1000.degree. C.) required of this technique are especially significant for shallow junction devices such as the x-band bipolar transistors. In spite of its advantages, this technique produced layers that were critically dependent on the anodizing current density and duration. If an insufficient amount of silicon was removed, the oxide created by the excess silicon could cause the slice to bulge.
The selective epitaxial process, in the past, was demonstrated for oxide thickness in the order of one micrometer, although much thicker oxide layers are preferred for even higher frequencies up to microwave frequencies. In general, epitaxial filling of thick oxide recesses has encountered numerous problems in the past such as (1) controlling the hydrogen chloride (HCl) etch back before epitaxial deposition: the HCl tends to damage the oxide mask and also undercut the silicon around the oxide opening; (2) controlling the spurious growth of silicon spikes on the oxide surface; and (3) controlling the silicon filling rate so that the epitaxial surface levels off with the oxide surface.
The above processes and problems clearly demonstrate a need for a process that overcomes these limitations.